Metal fuse and antifuse arrays are commonly used for non-volatile, complementary metal oxide semiconductor (CMOS) compatible storage. For example, programmable memory devices such as programmable read-only memory (PROM) and one-time programmable read-only memory (OTPROM) are typically programmed by either destroying links (via a fuse) or creating links (via an antifuse) within the memory circuit. In PROMs, for instance, each memory location or bitcell contains a fuse and/or an antifuse, and is programmed by triggering one of the two. The programming is usually done after manufacturing of the memory device, and with a particular end-use or application in mind. Once conventional bitcell programming is performed, it is generally irreversible.
Fuse links are commonly implemented with resistive fuse elements that can be open-circuited or ‘blown’ with an appropriate amount of high-current. Antifuse links, on the other hand, are implemented with a thin barrier layer of non-conducting material (such as silicon dioxide) between two conductor layers or terminals, such that when a sufficiently high voltage is applied across the terminals, the silicon dioxide or other such non-conducting material is effectively turned into a short-circuit or otherwise low resistance conductive path between the two terminals. Conventional antifuse links for use in programming memory are associated with a number of non-trivial issues.
As will be appreciated, the figures are not necessarily drawn to scale or intended to limit the claimed invention to the specific configurations shown. For instance, while some of the figures generally indicate straight lines, right angles, and smooth surfaces, an actual implementation of an antifuse structure may have less than perfect straight lines, right angles, and some features may have surface topology or otherwise be non-smooth, given real world limitations of the processing equipment and techniques used. In short, the figures are provided merely to show example structures.